Qsim: A multicore emulator


  • Pranith Kumar
  • Chad Kersey
  • He Xiao
  • Sudhakar Yalamanchili


  • A. Rodrigues (Sandia National Laboratories)
  • N. Wheeler (Laboratory for Physical Sciences, UMBC)
  • M. Fallet (Laboratory for Physical Sciences, UMBC)


  • National Science Foundation
  • Sandia National Laboratories
  • Laboratory for Physical Sciences (UMBC)

Qsim: Full System Emulator Front-End


QSim is part of the Manifold project at Georgia Tech and the Structural Simulation Toolkit (SST) project at Sandia National Laboratories (SNL). QSim is an emulation environment based on the QEMU full system emulator – an open source infrastructure that provides emulation for many standard instruction set architectures (ISAs). QSim’s primary intended use is as a functional front-end to a multi-core timing model.

QSim can be thought of as an API layer on top of QEMU that provides callbacks for detailed instruction-level execution information extracted from QEMU. Essentially, the QEMU translation cache is instrumented with various types of callbacks (e.g., register, memory, etc.,). Thus the QSim interface enables a cycle-level timing model to be driven by instruction streams from multiple virtual emulated cores and back-pressure from the timing model can be used to control the rate of instruction emulation. Consequently, the emulation and timing model can progress at mutually controlled rate at granularities ranging in the order from a basic block to thousands of instructions. Making full use of QEMU’s functionality, QSim boots slightly modified Linux operating systems and currently supports ARM64 and x86-64 ISAs.

Many other uses of QSim are envisioned. For example, the use cases of the popular PIN infrastructure are relevant, with the distinction being that QSim can also provide OS instruction streams. In the domain of micro-architecture simulators, the advantage of using a library like QSim is that the instruction set is emulated with high fidelity by QEMU, so the simulator only needs to implement those aspects of the instruction set relevant to its results. QSim itself is multi-threaded leading to some performance benefits when executing time consuming cycle-level simulations.


The source code is hosted on github. You can clone the repository as

$ git clone https://github.com/gtcasl/qsim

Once you clone the repository, running the setup.sh script the first time will set up the library by building it  and installing it to the respective folders.


Current stable release is Release 2.6 which can be downloaded from github.

Pre-built Qemu images are provided by the project for X86 and ARM64.


The user guide can be downloaded here.

Mailing List

All discussions and questions about the use and development of QSim can be posted to the group: qsim-dev@groups.google.com

We are also on IRC #qsim on server irc.oftc.net.


Chad D. Kersey, Arun Rodrigues, and Sudhakar Yalamanchili. 2012. A universal parallel front-end for execution driven microarchitecture simulation. In Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO ’12). ACM, New York, NY, USA, 25-32. paper

The papers are provided for personal use and are subject to copyright of the publishers.